[TangerineSDR] A few thoughts after Monday night telecon

Thu Jun 8 09:59:12 EDT 2023

Please remove me from all email lists.

On Thu, Jun 8, 2023, 09:34 Franco VENTURI via TangerineSDR <
tangerinesdr at lists.tapr.org> wrote:

> Thanks for the kind words Nathaniel and Jonathan.
>
> For what I know the optimal way of using the FX3 to achieve the maximum
> throughput is to feed it with 32bit of data at 100MHz (it can probably be
> overclocked a little bit, but this is a kind of a gray area since it would
> be out of specs).
> 32 bit at 100MHz is 3.2Gb/s, or 400,000kB/s, which is in line with
> Cypress/Infineon application note AN86947 "Optimizing USB 3.0 Thoughput
> with EZ-USB FX3" (
> https://www.infineon.com/dgdl/Infineon-AN86947_Optimizing_USB_3.0_Throughput_with_EZ-USB_FX3-ApplicationNotes-v05_00-EN.pdf?fileId=8ac78c8c7cdc391c017d073e3a2e6243
> ).
> This would require using the GPIF II interface, and a straight path to the
> FX3 DMA in 'AUTO' mode (i.e. no involvement at all of the internal MCU for
> the data transfer; it can be still used for the much slower SPI and I2C
> controls over a different USB control endpoint).
>
> As per receiving higher frequencies it could be done via undersampling
> with a good external band pass filter (and assuming there are no HF low
> pass filters on the board or that they can be disabled); I just had a quick
> look at the datasheet of the AD9648, and I noticed it says 'Differential
> analog input with 650 MHz bandwidth'; I know 650MHz is not enough for the
> hydrogen line at about 1,420MHz, but I am not sure about pulsars.
>
> 73,
> Franco  K4VZ
>
>
> On 06/08/2023 7:15 AM EDT Jonathan via TangerineSDR <
> tangerinesdr at lists.tapr.org> wrote:
>
>
> Hi Franco,
>
> I wanted to thank you for your input and involvement on this project! I
> wanted to propose the dual controller solution since the ADC has a two
> channel output, each data lane would be connected to each FX3. This would
> maintain more compatibility because you can use USB 3.0 and won't have to
> utilize USB 3.1 or greater speeds. With this, you can use lesser USB 3.0
> SBCs and if you want more processing, connect another server or system to
> that multicast group. This configuration would be great for amateur pulsar
> astronomy too if the frontend was modified for higher frequency bands,
> again, maintaining more compatibility with USB 3.0.
>
> Clocking would come from the GPSDO, of course.
>
> Can the FX3 accept both data lanes if you wanted to run the ADC and lower
> sampling rates and data lengths?
>
> Jonathan
> KC3EEY
>
> On Thu, Jun 8, 2023 at 12:28 AM Dr. Nathaniel A. Frissell Ph.D. via
> TangerineSDR <tangerinesdr at lists.tapr.org> wrote:
>
> Hi Franco,
>
>
>
> Thank you so much for joining us and for your comments and contributions.
> They are much appreciated.
>
>
>
> Dave Witten, Majid Mokhtari, and Tom McDermott are starting to discuss and
> plan the new USB-based interface board. I know they also appreciate your
> comments.
>
>
>
> Talk to you more soon and 73,
>
> Nathaniel W2NAF
>
>
>
> *From:* TangerineSDR <tangerinesdr-bounces at lists.tapr.org> *On Behalf Of *Franco
> VENTURI via TangerineSDR
> *Sent:* Wednesday, June 7, 2023 11:34 PM
> *To:* tangerinesdr at lists.tapr.org
> *Cc:* Franco VENTURI <fventuri at comcast.net>
> *Subject:* [TangerineSDR] A few thoughts after Monday night telecon
>
>
>
> First of all, thanks for the very interesting telecon last Monday night; I
> apologize I had to drop at around 10:30pm, but it was getting late here.
>
>
>
> With this message to the list I want to try to put on 'paper' some of the
> points of Monday discussion (plus a few other things I found out after
> that) to help moving forward. Please feel free to comment and add your
> thoughts (and correct my errors and omissions, of course).
>
>
>
> - the basic plan would be to have the ADC (AD9648) in the Tangerine SDR RF
> board somehow send the 'raw' stream of samples to the computer at 'full'
> speed; all the DSP processing would occur in the computer; a good approach
> for this would be Phil Karn's KA9Q ka9q-radio program running on the
> computer (fast convolution filter bank)
>
> - by 'full' speed we mean dual 16bit streams at 122.88MHz; the 16bit
> number comes from 14 bit from the ADC + 1bit for overflow + 1 bit to mark
> the PPS sample (if I understand correctly how Tom does it); doing some
> quick math this means being able to transfer to the computer about
> 3.932Gb/s
>
> - the USB 3.0 controller used by the RX888, Cypress/Infineon FX3, is
> capable of streaming about 32bit @100MHz, i.e. 3.2Gb/s
>
> - to reach the transfer rate of almost 4Gb/s there are two approaches:
> scale horizontally (i.e. two FX3 controllers) as suggested by Rob Robinett,
> or scale vertically (USB 3.1 gen 2, USB 3.2 gen 2, or USB 4); these can
> offer another USB mode called SuperSpeed Plus with a signaling rate of
> 10GHz, i.e. probably capable of transfer rates of the order of 8Gb/s. These
> last couple of days I searched on the Internet, and I couldn't find a
> 10Gbps USB peripheral controller that could be used in a way similar to the
> FX3. Monday night I thought Cypress/Infineon CCG6SF and CCG6DF could do it,
> but looking at this document (
> https://new-origin.infineon.com/dgdl/Infineon-EZ-PD_CCG6DF_CCG6SF_USB_Type-C_Port_Controller-DataSheet-v11_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ee8e2c571be),
> there is no mention of 10Gbps
>
> - someone mentioned that it wouldn't be too hard to modify the design of
> the data engine board to use one or two FX3's instead of the FPGA, and I
> would be very interested to understand better this option
>
> - also I think that someone mentioned that the FPGA could still be used to
> do some preprocessing of the data and reduce the amount of data that would
> need to be transferred via the USB 3 connection; perhaps sending the sum
> and the difference of the two streams could reduce the bandwidth required,
> since the difference would probably require less bits to be sent, similar
> to how the FM stereo signal is broadcast
>
> - another option to achieve that kind of transfer rate would be via PCIe,
> but in this case I think the data engine board would have to be a PCIe
> board, and that might make the design more complicated, not sure.
>
>
>
> I think this is all; I just wanted to start a conversation and I am
> looking forward to hearing your ideas.
>
>
>
> 73,
>
> Franco Venturi K4VZ
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