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<p class="MsoNormal">Hi everyone,<o:p></o:p></p>
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<p class="MsoNormal">Here are the recordings from last night’s meeting: <a href="https://scranton.zoom.us/rec/share/wulNL7j5xlFLHZGQuH6DAaI9F5jbeaa8gCMZ_vAExU_zBW88MHUw3Xt3XaQGXg-E">
https://scranton.zoom.us/rec/share/wulNL7j5xlFLHZGQuH6DAaI9F5jbeaa8gCMZ_vAExU_zBW88MHUw3Xt3XaQGXg-E</a>
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<p class="MsoNormal">73 de Nathaniel W2NAF<o:p></o:p></p>
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<p class="MsoNormal"><b>From:</b> TangerineSDR <tangerinesdr-bounces@lists.tapr.org>
<b>On Behalf Of </b>Tom McDermott via TangerineSDR<br>
<b>Sent:</b> Monday, July 6, 2020 10:18 PM<br>
<b>To:</b> TAPR TangerineSDR Modular Software Defined Radio <tangerinesdr@lists.tapr.org><br>
<b>Cc:</b> Tom McDermott <tom.n5eg@gmail.com><br>
<b>Subject:</b> [TangerineSDR] Notes from PSWS / TangerineSDR call of 07-05-2020<o:p></o:p></p>
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Notes from PSWS / TangerineSDR call of 07-05-2020<o:p></o:p></p>
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<p class="MsoNormal">1. Discussion on VITA-49 SDR protocol standard. The protocol format is open. Questions about VITA49 include:<br>
* How to handle and align multiple different streams.<br>
* How to time mark the data to be compliant with what Digital RF needs.<o:p></o:p></p>
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<p class="MsoNormal">(Digital RF needs the samples to be time-aligned to exactly a 1.000000 second boundary and uses ??? to identify gaps. It uses this to group the data into 1 second long files).<o:p></o:p></p>
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<p class="MsoNormal">2. Need to have a 192KHz (or related) clock for Jonathan's VLF/LF receiver (based on audio codec). This could come from the high-performance synthesizer on the clock module. It should not come from the FPGA (not clean enough for a 24-bit
ADC). The general scheme is to send the high quality clock to the receiver, which then sends data and the looped-around clock back to the FPGA (source synchronous).<o:p></o:p></p>
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<p class="MsoNormal">3. Dave Witten has updated the magnetometer code to chunk the data into one-day sets. He has created scripts for Hyomin to operate the sensor and collect data on a Raspberry PI.<o:p></o:p></p>
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<p class="MsoNormal">4. Scotty received the library files from Intel for the -6 FPGA variant he is planning to use.<o:p></o:p></p>
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<p class="MsoNormal">5. Scotty is planning to start a build of 50 magnetometer boards. It will take about 3 weeks to complete once started.<o:p></o:p></p>
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<p class="MsoNormal">-- Tom, N5EG<o:p></o:p></p>
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