[TangerineSDR] Notes from PSWS / TangerineSDR call of 09-21-2020

Tom McDermott tom.n5eg at gmail.com
Mon Sep 21 22:25:42 EDT 2020

Notes from PSWS / TangerineSDR call of 09-21-2020

1. Dan mentions that for Quartus in Linux on Ubuntu 20.04 he needed UDEV
files to allow connecting a byte blaster via USB for downloading the FPGA.

2. Welcome to Dick Pache K2LCT and James Wolford KG4DSG - new Tangerine
attendees who attended the gnuradio conference last week.

3. Scotty mentions that the RAM attached to the FPGA on the DE will be 512
megabits (64 MB), some of it used for hosting processing functions.
Potential is to use some of the RAM for capturing full-speed bursts from
the receiver ADC, then dump to an external computer in order to help with
receiver characterization.

4. Discussion about which variants and configurations of the clock module
would be available. Scotty said a few well-chosen specific use cases would
be supported, but not a general user-assembleable user-configurable unit.
Cost is driven primarily by single-vs-dual frequency GPS, and by the type
and quality of the VCXO.

5. Dave Witten has updated the magnetometer software to fix a bug when the
unit is not taking data. Code on github:

6. Discussion on the ADC interface timing for the VLF receiver. The VLF ADC
chip can operate in Master or Slave mode. The concern is finding a clean
clock (i.e. not directly from an FPGA), and providing correct data timing
from the DE to the VLF receiver back to the DE.
Potential options:
  1. Use a crystal on the VLF receiver.
  2. Use a programmable output from the clock module.
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