[TangerineSDR] Just joined and some comments
Scotty Cowling
scotty at tonks.com
Fri Apr 26 15:15:02 EDT 2019
Hi Lyle,
Welcome!
I guess it is my fault for putting the cart before the horse and
writing hardware spec for one of the boards in multi-board system,
expecting everyone to know what I am thinking.
So here goes. I will put this into an architecture document that we can
add to as we figure things out. But fr now, here is my vision of the
TangerineSDR system.
As for terms, PSWS stands for Personal Space Weather Station, a receive
only, 100KHz to 60MHz SDR receiver with some small array of sensors for
detecting magnetic disturbances and perhaps including some other as-yet
unspecified sensors. Nathaniel at New Jersey Institute of Technology
(NJIT), who is the head of the HamSCI organization, calls it the SSDR
or "Scientific Software Defined Radio".
The DE is supposed to be the "digital" part of a modular SDR that can be
assembled, with proper choice of modules, to be a PSWS, a Phase 4 ground
station radio (P4G, with a "nickle and dime" 5GHz uplink/10GHz
downlink), a general experimenter's SDR, a STEM SDR, etc. Kind of like a
modular Red Pitaya.
The reason you don't see any high-speed ADCs or DACs is because there
aren't any on the DE. The DE accepts one or two high-speed (via M.2
connectors and LVDS) RF modules. This allows us to build a $30 8-bit,
10Msps ADC board or a $300 16-bit, 250Msps ADC board, depending on what
the user's needs and wants are. We use M.2 (NGFF, like an SSD)
connectors because they are small, high-speed and cheap.
As Tom mentioned, one of the biggest problems with SDRs today is poor
clock quality (stability, phase noise, jitter, overall accuracy, etc).
We place the clock generator on a separate M.2 module, allowing the user
to pick an inexpensive VCXO (like the CVHD-950 from Crystek, now $15
from DigiKey) or an expensive GPSDO (like uBlox LEA-M8F or LEA-M9F or
Jackson Labs LTE-Lite) for $150. I plan to place an on-board reasonable
performance oscillator for the low-cost version of the DE that will not
require any clock module at all.
Speaking of DE variants, the base model DE (MAX10 FPGA, 50K LEs) can be
produced in several build versions, by de-populating some components for
reduced cost (and reduced functionality, of course). The idea is to come
out with several higher-end (and more expensive) versions of the DE
(like a big Cyclone V, 300K LEs or a Clyclone V SoC, 110K LEs plus a
dual core ARM HPS) that can use the same clock and RF modules.
By providing an on-board GbE switch, we can connect a Single Board
Computer (SBC), like a lower-performance Raspberry Pi 3+ or a higher
performance Odroid N2 via GIgabit Ethernet. Now we can separate the
command and control channel (Internet <--> SBC) from the streaming
channel (SDR <--> Internet) from the local control channel (SBC <-->
SDR). They will be on the same physical GbE wire, but they will be
logically separated.
This removes the low performance SBCs from inside the high-speed data
stream (which they could not keep up with anyway), while still allowing
TCP/IP command and control, network security and other low-compute power
tasks that the SBC can do at a price that I can never match on the DE board.
So the configurability is not meant to be for the user to have a
general-purpose radio, but for us to be able to address different
markets quickly by selecting different modules or build options, without
having to design a new board.
Hopefully this answers most of your questions, but maybe the whole idea
is hare-brained from the start. It is just my answer to dozens of SDRs
out there, and not one of them doing what I want. And I can't be alone.
But hopefully we appeal to at least 500 rather than 10 players.
73,
Scotty WA2DFI
On 2019-04-26 09:06, Lyle Johnson via TangerineSDR wrote:
> Hello Scotty, Dan and Tom!
>
> Still digesting the preliminary document. I see lots of IO...
>
> I also see references to PSWS which seems to be Personal Science Work
> Station. Not sure what this is intended to be.
>
> I also recall some interest in a "space weather station" but have been
> out of the loop for too long.
>
> The TangerineSDR Data Engine seems to be a general purpose FPGA
> development board with lots of specialized IO.
>
> I am unclear as to what specific problems this project is attempting
> to solve, or what peripheral board(s) might be needed to solve the
> problem set that is driving this development. Are such boards already
> existing (hence the large set of various standard IO interfaces) or do
> many/most of them still need to be designed -- and if so how does that
> play out in the overall scheme of things?
>
> TAPR's early history with general purpose solutions not aimed at
> solving a particular (perceived) need in the community in general
> meant a lot of development effort by one to five individuals to create
> something that was only adopted by a few tens (METCON comes to mind).
>
> Does a board like the Red Pitaya - especially if it were to have a
> TAPR-sourced "IO expander" - already solve many or most of the
> problems that this board attempts to solve? Or the new Red Pitaya-SDR
> with bigger FPGA, better ADC, 50-ohm front end, lower noise floor, etc
> but at $500 (fast 16 bit ADCs and 14-bit DACs) instead of $200 (10-bit
> fast ADCs/DACs) or $300 (fast 14-bit ADCs/DACs), solve the problem(s)?
>
> -Lyle KK7P
>
>
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