[TangerineSDR] Fwd: Silicon Labs 5344 EVB Allan Deviation

Tom McDermott tom.n5eg at gmail.com
Wed Apr 24 18:03:07 EDT 2019


This is a re-send of the first message to test the mailing list for
allowing in-line images.

I measured the Allan Deviation of the Silicon Labs de-jitterizer /
synthesizer on the Silicon Labs
evaluation board.  This part is a candidate for generating the ADC clock
and FPGA DDC NCO
from a GPS receiver.

Tests:

1. Allan Deviation vs. de-jitterizer bandwidth. The ADEV degrades a lot for
loop bandwidths
less than 100 Hertz (as the datasheet cautions).

2. Allan Deviation vs. Synthesizer output frequency.

For most frequencies, the curves lay on the same line at 10.0 MHz output
(see chart attached).
I was able to find one frequency especially picked to give the synthesizer
a tough time, and the
Allan Deviation of that is substantially worse (see chart).  That frequency
is 48.0 M * 31/149,
or 9.9865718128 MHz.

My test setup:  Rubidium oscillator at 10.00000 MHz (undisciplined) feeding
both the synthesizer
and the reference input to a TICC. TICC is thus measuring the synthesizer
output vs. the synthesizer input.

3. John Ackermann N8UR has measured the phase noise vs. loop bandwidth, and
there are some tradeoffs.
John will have to describe his test setup, I believe it was done near 144
MHz.

-- Tom, N5EG




Attachment 1: ADEV vs. Loop BW. The magenta line is 100 Hz loop bandwidth
(default value). All measurements at 10.00000000 MHz output.
[image: image.png]

Attachment 2: ADEV vs. 10.00000000 and 9.986571812 MHz output
[image: image.png]


Attachment 3: (from John Ackermann) Phase noise vs. loop BW.

[image: Si5342_PN.png]
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